Oubits
Qubits can be used as fundamental units of information for a quantum computer. Qubits can refer to the actual physical device in which information is stored, and it can also refer to the unit of information itself, abstracted away from its physical device. Examples of qubits include quantum particles, atoms, electrons, photons, ions, and the like.
Qubits generalize the concept of a classical digital bit. A qubit contains two discrete physical states, which can also be labeled “0” and “1”. Physically these two discrete states are represented by two different and distinguishable physical states of the quantum information storage device, such as direction or magnitude of magnetic field, current, or voltage, where the quantity encoding the bit state behaves according to the laws of quantum physics. If the physical quantity that stores these states behaves quantum mechanically, the device can additionally be placed in a superposition of 0 and 1. That is, the qubit can exist in both a “0” and “1” state at the same time, and so can perform a computation on both states simultaneously. In general, N qubits can be in a superposition of 2N states.
In standard notation, the basis states of a qubit are referred to as the |0> and |1> states. During quantum computation, the state of a qubit, in general, is a superposition of basis states so that the qubit has a nonzero probability of occupying the |0> basis state and a simultaneous nonzero probability of occupying the |1> basis state. Mathematically, a superposition of basis states means that the overall state of the qubit, which is denoted |Ψ), has the form |ψ>=a|0>+b|1>, where a and b are coefficients corresponding to the probabilities |a|2 and |b|2, respectively. The coefficients a and b each have real and imaginary components, which allow the phase of the qubit to be characterized. The quantum nature of a qubit is largely derived from its ability to exist in a coherent superposition of basis states and for the state of the qubit to have a phase. A qubit will retain this ability to exist as a coherent superposition of basis states when the qubit is sufficiently isolated from sources of decoherence.
To complete a computation using a qubit, the state of the qubit is measured (i.e., read out). Typically, when a measurement of the qubit is performed, the quantum nature of the qubit is temporarily lost and the superposition of basis states collapses to either the |0> basis state or the |1> basis state thus regaining its similarity to a conventional bit. The actual state of the qubit after it has collapsed depends on the probabilities |a|2 and |b|2 immediately prior to the readout operation.
Superconducting Qubits
There are many different hardware and software approaches under consideration for use in quantum computers. One hardware approach uses integrated circuits formed of superconducting materials, such as aluminum or niobium.
Superconducting qubits are a type of superconducting device that can be included in a superconducting integrated circuit. Typical superconducting qubits, for example, have the advantage of scalability and are generally classified depending on the physical properties used to encode information including, for example, charge and phase devices, phase or flux devices, hybrid devices, and the like. Charge devices store and manipulate information in the charge states of the device, where elementary charges consist of pairs of electrons called Cooper pairs. A Cooper pair has a charge of 2e and consists of two electrons bound together by, for example, a phonon interaction. Flux devices store information in a variable related to the magnetic flux through some part of the device. Phase devices store information in a variable related to the difference in superconducting phase between two regions of the phase device. Recently, hybrid devices using two or more of charge, flux and phase degrees of freedom have been developed.
Examples of flux qubits include rf-SQUIDs, which include a superconducting loop interrupted by one Josephson junction, or a compound Josephson junction (where a single Josephson junction is replaced by two parallel Josephson junctions), or persistent current qubits, which include a superconducting loop interrupted by three Josephson junctions, and the like. Examples of qubits include hybrid charge-phase qubits.
The qubits may be associated with a corresponding local bias device. The local bias devices may include a metal loop in proximity to a superconducting qubit that provides an external flux bias to the qubit. The local bias device may also include a plurality of Josephson junctions. Each superconducting qubit in the quantum processor may have a corresponding local bias device or there may be fewer local bias devices than qubits. In some instances, charge-based readout and local bias devices may be used. Conventional readout device(s) include dc-SQUID magnetometers inductively connected to a respective qubits within a topology. The readout device may provide a voltage or current. The dc-SQUID magnetometers typically are formed by a loop of superconducting material interrupted by at least one Josephson junction.
Quantum Processor
A computer processor may take the form of an analog processor, for instance a quantum processor such as a superconducting quantum processor. A superconducting quantum processor may include a number of qubits and associated local bias devices, for instance two or more superconducting qubits. Further detail and embodiments of exemplary quantum processors are described in U.S. Patent Publication No. 2006-0225165, U.S. patent application Ser. No. 12/013,192, and U.S. Provisional Patent Application Ser. No. 60/986,554 filed Nov. 8, 2007 and entitled “Systems, Devices and Methods for Analog Processing.”
A superconducting quantum processor may include a number of coupling devices operable to selectively couple respective pairs of qubits. Examples of superconducting coupling devices include rf-SQUIDs and dc-SQUIDs, which couple qubits together by flux. SQUIDs include a superconducting loop interrupted by one Josephson junction (an rf-SQUID) or two Josephson junctions (a dc-SQUID). The coupling devices may be capable of both ferromagnetic and anti-ferromagnetic coupling, depending on how the coupling device is being utilized within the interconnected topology. In the case of flux coupling, ferromagnetic coupling implies that parallel fluxes are energetically favorable and anti-ferromagnetic coupling implies that anti-parallel fluxes are energetically favorable. Alternatively, charge-based coupling devices may also be used. Other coupling devices can be found, for example, in U.S. Patent Publication No. 2006-0147154 and U.S. patent application Ser. No. 12/017,995. Respective coupling strengths of the coupling devices may be tuned between zero and a maximum value, for example, to provide ferromagnetic or anti-ferromagnetic coupling between qubits.
Regardless of the specific hardware being implemented, managing a single qubit requires control over a number of parameters. Conventionally, this requirement necessitated outside communication (that is, communication from outside of the processor architecture) with individual qubits. However, since overall processing power increases with the number of qubits in the system, high capacity processors that exceed the abilities of conventional supercomputers must manage a large number of qubits and, thus, the conventional approach of employing outside control over multiple parameters on individual qubits requires a complicated system for programming qubit parameters.
Thus, the scalability of quantum processors is limited by the complexity of the qubit parameter control system and there is a need in the art for devices that enable a scalable qubit parameter control system.
Digital-to-Analog Converters (DACs)
Quantum processors provide a plurality of programmable devices for performing computations with quantum effects. Programmable devices include qubits, couplers (which programmably couple qubits), and components thereof. Programmable devices are programmed via signals applied to influence their operation—for example, a biasing signal may be applied to a flux qubit to affect its flux during computation.
Such signals often require conversion and/or storage prior to being applied to programmable devices. For example, a classical computer may generate digital signals for the quantum processor, and those digital signals may be converted to analog form via one or more digital-to-analog converter (DAC). The converted analog signal may be applied to the programmable device. As another example, a signal (which may be digital or analog) may be received by the quantum processor at one time before or during a computation and stored via a DAC until the signal is to be applied to a programmable device at a later time. DACs have many applications, and may be used for one or more of these purposes (i.e., conversion and/or memory) and/or for other purposes. Examples of applications of DACs for these and other purposes are described in greater detail in, for example, U.S. Pat. Nos. 7,876,248 and 8,098,179.
Superconducting quantum processors often comprise a plurality of DACs for these and other functions. Such DACs include superconducting DACs which store a flux (sometimes referred to as Φ-DACs), which generally comprise a storage inductor (e.g., a superconducting magnetic coil) and a programmable coupling element. Φ-DACs take advantage of the flux rate of change of the circuit (e.g., of the storage inductor) to store energy in their magnetic fields, thereby generating an effective inductance (sometimes referred to as a magnetic inductance).
Φ-DAC designs can impose various costs on the design of the processor. For example, magnetic storage inductors which can store sufficient flux for a typical design are often relatively large (and may require several fabrication layers using current techniques), which may constrain the space available for other components on the processor. Further, the magnetic field generated by the Φ-DAC may be powerful and require significant shielding. Even when shielded, the Φ-DAC will likely result in cross-talk with other flux-sensitive devices on the processor. Further still, at least some Φ-DAC designs are particularly sensitive to fabrication variability. Examples of Φ-DAC designs are described in greater detail in, for example, Johnson et al., “A scalable control system for a superconducting adiabatic quantum optimization processor”, arXiv:0907.3757; and Bunyk et al., “Architectural considerations in the design of a superconducting quantum annealing processor”, arXiv:1401.5504.
There is thus a general desire for systems and methods for providing superconducting DACs which ameliorate at least some of these deficiencies.
Quantum Flux Parametron
A quantum flux parametron (QFP) is a superconducting Josephson junction device similar in some respects to a compound rf-SQUID. A particular potential energy curve may be generated with a QFP device. This potential energy curve may resemble a “W” where the central peak or “barrier” is adjustable in height, as are the independent depths of the two wells on either side of the central barrier. Although the word “quantum” appears in the name of the QFP device, the device is generally operated in a classical manner. In short, quickly raising the height of the central barrier is classically believed to greatly disrupt the energy configuration of the system. Thus, damping resistors are traditionally incorporated into the QFP circuit to help dissipate energy and return the system to a stable energy configuration. These damping resistors dissipate excess energy in the form of heat, a process that can have negative effects on any system that is particularly sensitive to thermal noise. Thus, conventional QFP circuits are typically unsuitable for use with devices that are sensitive to thermal noise, such as the elements of a superconducting quantum processor.
Scalability
The data rate of a non-dissipative readout (NDRO) in a superconducting processor (such as the NDRO described in U.S. Pat. No. 8,169,231) is constant regardless of the processor size. Consequently, the approach does not scale to large processor sizes, for example, a quantum processor having a large number of qubits or a classical superconducting processor having a large number of devices.
Though the data rate can be increased by adding more NDRO lines and associated hardware, the approach is not readably scalable to large numbers of qubits.
Additional NDRO lines increase the thermal load on the refrigerator (i.e., fridge), raising a base temperature of the fridge. The increased power driven on-chip can increase the chip's heat load. Since performance of the processor can depend on low chip temperature, there can be a trade-off between processor performance and readout speed. Furthermore, adding more lines increases the cost of the hardware.
The performance of a superconducting quantum processor can be limited by the number and bandwidth of input lines. For example, in some existing implementations, the superconducting quantum processor can be accessed via approximately 200 lines each having a bandwidth of 30 MHz. The number and bandwidth of the input lines can, at least in part, determine the rate at which the system can encode new problems on the quantum processor.
Increasing the number and bandwidth of lines is not a readily scalable approach. Adding more lines can create a number of demands on the system including the need for a larger sample space, and the need for more contact pads on the periphery of the processor chip. Increasing the number of lines can also increase the thermal load on the processor. Moreover, an increase in the number of lines can open up more pathways for non-thermal photons.
The foregoing examples of the related art and limitations related thereto are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the drawings.